Writing code for the ST10F269Zx with 0.35 µm embedded Flash

AN2692

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2.3

Flash memory mapping in the ST10F269Zx memory space

As defined for all ST10 derivatives, the lower 32 Kbyte part of the embedded Flash memory

can be mapped to two different segments.

The Flash memory mapping is controlled by the ROMS1 bit in the SYSCON register.

2.4

Program command

In the examples hereafter, the 16-bit registers R11 and R12 are used as auxiliary registers

for indirect addressing.

The following examples use DPP0. All that is needed is to make sure that DPP0 points to

the active Flash memory area.

To be independent of the mapping of sector 0, DPP is set to point to segment 2 (that is:

DPP0 = 08h).

Note:

The NOP instruction must be added after the last erase or program command to avoid the

ST10 pipeline effect (see Flash commands and ST10 pipeline effect on page 8).

Figure 2 shows the algorithm for word programming verification.

Figure 2.

Verification algorithm for word programming

Table 2.

Flash memory block mapping (lower 32 Kbytes of memory)

1.

The memory mapping of the other block is independent of the ROMS1 bit.

Addresses (Segment 0)

Addresses (Segment 1)

Size (Kbytes)

0

1

2

00 0000h to 00 3FFFh

00 4000h to 00 5FFFh

00 6000h to 00 7FFFh

01 0000h to 01 3FFFh

01 4000h to 01 5FFFh

01 6000h to 01 7FFFh

16

8

8

Program Word command

FSB.7, DATA.7

FSB.5 = 0?

FSB.7, DATA.7

No

No

No

Yes

Yes

Yes

ai14877

Data polling

Programming OK

Programming error