AN2549 datasheet(25/33 Pages) STMICROELECTRONICS

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AN2549

New registers

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The three memory configurations possible for this 64 Kbytes of 'normal user data' are:

●

Default

The four DPP registers are assumed to contain their system startup value (0-3),

providing one linear data area of 64 Kbytes in the first segment (00’0000h - 00’FFFFh).

●

Addresses Linear

DPP3 contains page number 3, allowing access to SYSTEM (extended) SFR registers

and bit-addressable memory. DPP0 - DPP2 provide a linear data area of 48 Kbytes

anywhere in memory.

●

Paged

DPP3 contains page number 3, allowing access to SYSTEM (extended) SFR registers

and bit-addressable memory. DPP0, DPP1 and DPP2 contain the page number of a

data area of 16 Kbytes anywhere in memory.

Therefore, mapping the XRAM2 onto page 2 (segment 0) makes it available for PEC transfer

and the default configuration of the C compiler toolchains can still be used.

4.2

XPEREMU register

This register has been added as a write-only register.

The bit meaning is exactly the same as in the XPERCON register.

4.2.1

Hardware impact

None.

4.2.2

Software impact

Once the XPEN bit of the SYSCON register is set and at least one of the XPeripherals

(except for memories) is activated, the XPEREMU register must be written with the same

contents as the XPERCON register: This is mandatory in order to allow a correct emulation

of the new set of features introduced on XBus for the new ST10 generation. The following

instructions must be added inside the initialization routine:

if (SYSCON.XPEN && (XPERCON & 0x07D3))

then {XPEREMU = XPERCON}

Of course, XPEREMU must be programmed after XPERCON and after SYSCON. In this

way, the final configuration for XPeripherals is stored in XPEREMU and used for the

emulation hardware setup.

ST10F272Z2: XPEREMU (EB7Eh)

XREG

Reset value: XXXXh

98765

4321

Reserved

XMIS

CEN

XI2

CEN

XSS

CEN

XAS

CEN

XPW

MEN

Res.

XRT

CEN

CAN2

CAN1

WOWOWO

WOWO

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