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AN1711 bảng dữ liệu(PDF) 30 Page - STMicroelectronics |
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AN1711 bảng dữ liệu(HTML) 30 Page - STMicroelectronics |
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30 / 40 page ![]() 30/40 SOFTWARE TECHNIQUES FOR COMPENSATING ST7 ADC ERRORS 00-0x7F and 0x200 to 0x27F: +2 0x80-0xFF and 0x280 to 0x2FF: +1 0x100-0x17F and 0x300 to 0x37F: -1 0x180-0x200 and 0x380-0x3FF: 2 4.2.6 Autocalibration for Offset and Gain errors Approximate Offset and Gain errors can be calculated by software and external hardware and these parameters can be used for calibrating the ADC. Use a spare analog channel for calcu- lating the offset and gain error. Use an external resistor network to get the known voltages near to ground and VDDA. Do the ADC conversion on this spare ADC channel and calculate the Offset and Gain error. Figure 20. Hardware setup for calculating offset and gain errors Example: Get the low voltage on AIN2 equivalent to 10LSB and get the voltage on AIN1 as (1023- 10)LSB for a 10-bit ADC. After doing the ADC conversion on AIN2, the digital code received can be compared to 10LSB and offset error can be calculated. This will be an approximate value and assumes a straight line transfer curve from the first transition to the 10LSB. Similarly gain error can be calculated and compensated. The resistor should be precise with less than 1% tolerance. Resistance values chosen were R1=R3=100 Ohm, R2=9.8K Ohm. For VDDA = 5V, Expected digital output on AIN2 = (100/10K)*1023 = 10 (approx.) Expected digital output on AIN1 = ((100+9.8K)/10K)* 1023 = 1012.7 = 1013 (approx.) AIN0 VAIN ADC Microcontroller AIN2 \/\/\/\/\/\/ AIN1 VSSA VDDA R1 R2 R3 |
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