AN1711 datasheet(20/40 Pages) STMICROELECTRONICS

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SOFTWARE TECHNIQUES FOR COMPENSATING ST7 ADC ERRORS

If 2 NOP instructions are used, it will take 7 executions of the loop

If 3 NOP instructions are used it will take 5 executions of the loop

If 4 NOP instructions are used it will take 4 executions of the loop

See: ADC_do_conversion()

3.2 USING SLOW MODE

You can use “Slow mode” to reduce the internal noise generated by the CPU. SLOW mode re-

duces the CPU frequency fCPU. This reduces the internal noise because the CPU runs slower

and executes the code at a lower frequency.

For devices with fCPU(max)=8 MHz and fADC(max) =2 MHz, you can utilise the SPEED bit

available in some ADCs. Refer to section 1.1 on page 4. If you set the SPEED bit, you can use

fADC = fCPU/2. So in this configuration you can reduce the fCPU to 4 MHz by setting the SLOW

mode and you can set the SPEED bit to make fADC(max) =2 MHz.

In the software example: the following sequence is used

1. MCCSR register, keep CP[1:0] = 00. fCPU = fOSC2/2

2. MCCSR register, Set SMS (Slow mode select) = 1

This configures fCPU = 4 MHz and fADC = 1 MHz

3. Set the SPEED bit in the ADCCSR register

This configures fADC = 2 MHz

Use #define ADC_SLOW_MODE_SELECT in adc_tech.h to enable the ADC conversions in

SLOW mode.

3.3 USING WAIT MODE

You can also use WAIT mode to reduce the internal noise generated by the CPU. In WAIT

mode the CPU is OFF and the peripherals are working. Note that some ADCs do not have in-

terrupt capability, but anyhow you can wake up the CPU from WAIT mode by means of a timer

interrupt or an external interrupt.

In the software example, we use the Timer-A output compare interrupt to wake up the CPU

from WAIT mode.

The value to be compared is chosen in order to take enough time to allow one ADC conver-

sion to be completed. We can also use a time period which is equivalent to 2 conversions. This

would guarantee that at least the second conversion is done while the CPU is in WAIT mode.

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