DocID026335 Rev 1

11/16

UM1763

Example IV

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Example IV

Figure 3. Example 03 application scheme

The example IV aims to create an application generating a PWM signal as a function of the

analog input voltage. As shown in Figure 3, the PWM0 will have a fixed frequency of

50 KHz but a variable duty cycle according to the sensed input signal.

In order to dime the input voltage, the shown analog circuit must be implemented and

plugged to the evaluation board.

Figure 4. PWM0 constant frequency with variable duty cycle

When the input voltage is below the lower threshold set to 200 mV, the PWM0 is OFF. If the

input voltage Vin ranges from 200 mV to 1 V, the PWM0 toggles at a fixed frequency of

50 KHz, but its duty cycle ranges from 2.5% to 97.5% with a 10 ns step leaving, so

a minimum off-time equals to 500 ns. When Vin overcomes the upper threshold set to 1 V,

the PWM0 is OFF. The implemented FSM is shown in Figure 4.