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AN4460 bảng dữ liệu(PDF) 22 Page - STMicroelectronics |
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AN4460 bảng dữ liệu(HTML) 22 Page - STMicroelectronics |
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22 / 54 page ![]() Firmware implementation AN4460 22/54 DocID026129 Rev 1 Figure 7. Dimming channel relation 5.2 Firmware evolution The following section describes the software timing characteristics as shown in Figure 8. Figure 8 shows the relationship between two consecutive STMR_ISR() routines and the other principal subroutines. The colors define if the routines run in interrupt mode (colored) or are called from main (black). The PMW1_ON line is the dimming period: when the line is high, the PWM signal is high too. Figure 8. FW timeline evolution The lines are here described: STMR_ISR(): STMR timer interrupt. The STMR timer has a granularity of 20 µs (STMR unit). The timer is used to start and stop the dimming period for each SMED and triggers the SWx bit on the MSC SMSWEV register. On every interrupt, the timer is reprogrammed so that the next 1/200 Hz = 5 mS DIMM1 time T8 T0 T2 T4 T6 T0 DIMM2 DIMM3 DIMM4 T2 T4 T6 T0 T2 1/200 Hz = 5 mS AM16707v1 1/200 Hz = 5 mS PWM _ 1ON time T0 ADC_ISR() Get_Key() STMR_ISR() Not in scale Comp_PWM () SMEDx_ISR() Comp_DUTY() AWU time AM16708v1 |
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