AN2782 datasheet(19/39 Pages) STMICROELECTRONICS

19 / 39 page

AN2782

Designing a fixed off-time PFC

Doc ID 14763 Rev 2

19/39

From (20) and (50) the maximum thermal resistance to keep the junction temperature below

125 °C is then:

The diode is attached to the same heat sink as the power MOSFET. The STTH8R06 has an

isolated package and can be attached directly to the heat sink. Silicone thermal grease may

be applied to improve the thermal contact between the diode and heat sink.

4.3.7

L6562A biasing circuitry

Following the dimensioning of the power components, the biasing circuitry for the L6562A is

also described. For reference, the internal schematic of the L6562A is represented below in

Figure 11

. For more details on the internal functions, please refer to the datasheet.

Figure 11.

L6562A internal schematic

●

Pin 1 (INV): This pin is connected both to the inverting input of the E/A and to the OVP

circuitry. A resistive divider is connected between the boost regulated output voltage

and this pin. The internal reference on the non-inverting input of the E/A is 2.5 V (typ),

while the OVP intervention threshold is 27 µA (typ). RoutH and RoutL are then selected

as follows:

(51)

diode

ambx

125

−

125

−

(52)

(53)

VREF2

OVERVOLTAGE

DETECTION

VOLTAGE

REGULATOR

UVLO

INTERNAL

SUPPLY BUS

= 2.5V

STARTER

ZERO CURRENT

DETECTOR

1.4 V

0.7 V

VCC

ZCD

VCC

INV

COMP

MULT

GND

25 V

Starter

stop

LEADING-EDGE

BLANKING

DIS

LOWER & UPPER

CLAMPS

DIS

0.45 V

0.2 V

DYN

OVP

STAT

OVP

MULTIPLIER AND

THD OPTIMIZER

DRIVER

& CLAMP

ERROR

AMPLIFIER

PWM

COMPARATOR

1 V

VREF

out

outL

outH

−

159

400

outL

outH

−

OVP

outH

481

outH

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