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AN1882 bảng dữ liệu(PDF) 14 Page - STMicroelectronics |
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AN1882 bảng dữ liệu(HTML) 14 Page - STMicroelectronics |
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14 / 30 page ![]() Short-circuit protection AN1882 14/30 Doc ID 10209 Rev 4 Figure 11. Valley current limit protection 4.1 Synchronization The device can be synchronized with an external signal from 500 kHz up to 1.4 MHz through the internal PLL. When the device is locked, the external signal and the high side turn on rising edges are aligned. In this case the low noise mode is automatically selected. The device will eventually skip some cycles in very light load conditions depending also on the input/output conditions. The internal synchronization circuit is inhibited in short-circuit and over-voltage conditions in order to keep the involved protections effective. The synchronization signal amplitude can range typically from 1 V to VCC and the duty factor can range typically from 20% to 80%. Sometimes, if the synchronization signal duty cycle is very similar to the application duty factor, noise can be detected on the LX pin. In this case some practical solutions are: 1. Change the synchronization signal duty factor 2. Decrease the synchronization signal amplitude 3. Add 20 pF capacitor between the comp pin and ground. The device switches at 600 kHz (typ.) if no synchronization signal is applied. 4.2 DROPOUT operation When the input voltage is a Li-Ion battery, the voltage ranges from a minimum of 3 V or less to 4.1 V - 4.2 V (depending on the anode material). In case the regulated output voltage is from 2.5 V and 3.3 V, the device can work in linear mode or dropout operation. The minimum input voltage necessary to ensure output regulation can be calculated as: Equation 8 where RDSON_HS_MAX is the maximum high side resistance and RL is the series inductor resistance. V INMIN V O I O R DS on ()HSMAX R L + () ⋅ + = -- - |
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