AN4129 datasheet(23/39 Pages) STMICROELECTRONICS

23 / 39 page

AN4129

Circuit description and design guidance

Doc ID 023314 Rev 1

23/39

Equation 3

where n is the transformer turns ratio, VCLED is the internal reference, and RSENSE is the

current sensing resistor. Internally VCLED is 0.2 V.

This is the ideal situation. Actually, because the transformer is not the ideal transformer,

imperfect coupling makes the actual turn's ratio less than the designed value. Also the

voltage feed-forward compensation and demagnetizing time further reduces the actual LED

current from the calculated number. Typically, the reduction factor (coefficient K in Equation

4 below) is around 0.85~0.9. Therefore, the formula to determine the resistor is:

Equation 4

For this demonstration board, with turns ratio of 2 and a 1.00

Ω 1% current sensing resistor,

we get the LED current around 180 mA. For different designs, small modifications may be

needed, but once the final values are selected repeatability from unit to unit is excellent.

4.11

AC injection divider (R3, R4)

In the US, total harmonic distortion (current) must be kept below 20% of the 60 Hz

fundamental.

The input current is already distorted due to the use of a sinusoidal peak current envelope.

Input current harmonic distortion actually improves slightly when the line current goes to

zero for a short time around the voltage zero crossing. The distortion minimum only occurs

at one input voltage, increasing as the line voltage is moved away from that point. The

average of the injected AC waveform (not the RMS value) should be set approximately

equal to the DC level required to give the correct current to the LEDs. At nominal line the

average injected voltage is close to 0.95 V - the RMS voltage is 1.111 times the average, or

1.05 V, peak voltage about 1.45 V. Modifications may be necessary, but repeatability

between units is excellent once the values are selected.

There are two limits on the impedance of the network:

●

Loss in the divider (mostly the upper resistor), which affects efficiency

●

Impedance at the IREF pin should be much lower than that of the internal duty cycle

calculation circuitry.

An upper divider resistance of 270 k

Ω keeps resistive loss low.

Equation 5

The efficiency reduction for this loss is 0.053 W/9.8 W = 0.54%.

The impedance looking into the ILED pin of the HVLED815PF is approximately 1.5 V/

10 µA

≅ 150 kΩ. This varies with duty cycle - it is lower as the line voltage is increased.

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