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RM0345 bảng dữ liệu(PDF) 14 Page - STMicroelectronics |
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RM0345 bảng dữ liệu(HTML) 14 Page - STMicroelectronics |
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14 / 38 page ![]() Calibration bus interface and External Memory RM0345 14/38 Doc ID 024080 Rev 3 4.3 Calibration bus interface The calibration bus is made up of address bus, data bus, and bus control signals, and is used on the calibration board to access the upon board memory. The calibration board supports a 16-bit de-mulitplexed calibration bus. This is derived from the multiplexed bus on the SPC563M64xx, where the majority of address lines are derived from the data lines (CAL_DATA on SPC563M64 device), by using an onboard external latch controlled by the C_TS signal. The ALE functionality of this signal indicates to the external latch when to capture the address signals Figure 7. SRAM schematic diagram The Section 9: Calibration software compatibility and configuration shows the necessary software configuration of the SPC563M64xx calibration interface. |
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