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AN4035 bảng dữ liệu(PDF) 34 Page - STMicroelectronics |
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AN4035 bảng dữ liệu(HTML) 34 Page - STMicroelectronics |
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34 / 42 page ![]() Nexus Read/Write access block AN4035 34/41 Doc ID 022669 Rev 2 4.5 Burst block memory read access The steps to perform a burst block memory read access via the Nexus R/W access block are: 1. Initialize RWA with the first address to be read using Nexus register index 0x9. The address needs to be aligned on an 8-byte boundary. RWA[2:0] are ignored on a burst read. 2. Initialize RWCS using Nexus register index 0x7. - Access Control (AC) = 0b1 (to indicate start access) - Map Select (MAP) = 0b000 (primary memory map) - Access Priority (PR) = 0b00 (lowest priority) - Read/Write (RW) = 0b0 (read access) - Word Size (SZ) = 0b011 (64-bit) - Access Count (CNT) = 0b00_0000_0000_0100 (four double-words)- - Burst Control (BST) = 0b1 (burst enabled) 3. The Nexus block then arbitrates for the system bus and transfer the burst data from memory to the burst data buffer starting at the address in RWA. When the access has completed without error then RWCS[ERR] = 0 and RWCS[DV] = 1. See Table 8 for details. This indicates that the device is ready for the next access. Nexus also asserts the RDY pin when the transaction has completed without error. The external tool can use this as an alternative to polling the RWCS status bits. 4. Read all 32 bytes of data from RWD using Nexus register index 0xA, 32-bits at a time, starting with the first 32-bit word read from the address in RWA. The endianess of the 32-bit data read from RWD is little endian. - Value of 0xDEADBEEF read from memory: RWD = 0xEFBEADDE |
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