W9812G2KB datasheet(3/43 Pages) WINBOND

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W9812G2KB

Publication Release Date: Jun. 20, 2014

- 3 -

Revision: A01

GENERAL DESCRIPTION

W9812G2KB is a high-speed synchronous dynamic random access memory (SDRAM), organized as

1M words

 4 banks  32 bits. W9812G2KB delivers a data bandwidth of up to 166M words per

second. To fully comply with the personal computer industrial standard, W9812G2KB is sorted into

two grade parts: -6 and -6I. The -6 and-6I grade parts are compliant to the 166MHz/CL3 specification

(the -6I industrial grade which is guaranteed to support -40°C

≤ TA ≤ 85°C).

Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be

accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE

command. Column addresses are automatically generated by the SDRAM internal counter in burst

operation. Random column read is also possible by providing its address at each clock cycle.

The multiple bank nature enables interleaving among internal banks to hide the precharging time.By

having a programmable Mode Register, the system can change burst length, latency cycle, interleave

or sequential burst to maximize its performance. W9812G2KB is ideal for main memory in high

performance applications.

FEATURES



3.3V ± 0.3V power supply



1,048,576 words

 4 banks  32 bits organization



Self Refresh Current: Standard and Low Power



CAS Latency: 2 & 3



Burst Length: 1, 2, 4, 8 and full page



Sequential and Interleave Burst



Byte data controlled by DQM0-3



Auto-precharge and controlled precharge



Burst read, single write operation



4K refresh cycles/64mS



Interface: LVTTL



Packaged in TFBGA 90 Ball (8 x13 mm2), using Lead free materials with RoHS compliant



Dual-Die-Package (DDP), two pieces of 64M bits chip sealed in one package

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