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HT9B92G bảng dữ liệu(PDF) 14 Page - Holtek Semiconductor Inc |
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HT9B92G bảng dữ liệu(HTML) 14 Page - Holtek Semiconductor Inc |
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14 / 21 page  Rev. 1.00 14 April 18, 2014 HT9B92G Acknowledge • Each bytes of eight bits is followed by one acknowledgebit.ThisAcknowledgebitisalow levelplacedonthebusbythereceiver.Themaster generates anextraacknowledge relatedclock pulse. • Aslavereceiverwhichisaddressedmustgenerate anAcknowledge,ACK,afterthereceptionofeach byte. • Thedevicethatacknowledgesmustpulldownthe SDAlineduringtheacknowledgeclockpulseso thatitremainsstablelowduringthehighperiodof thisclockpulse. • Amasterreceivermustsignalanendofdatatothe slavebygeneratinganot-acknowledge,NACK, bitonthelastbytethathasbeenclockedoutof theslave.Inthiscase,themasterreceivermust leavethedatalinehighduringthe9thpulsetonot acknowledge.ThemasterwillgenerateaSTOPor repeatedSTARTcondition. S 1 2 7 8 9 clock pulse for acknowledgement Data Output by Transmitter Data Outptu by Receiver SCL From Master acknowledge not acknowledge START condition Slave Addressing • Theslaveaddressbyteisthefirstbytereceived followingtheSTARTconditionformthemaster device.Thefirstsevenbitsofthefirstbytemake uptheslaveaddress.Thisdeviceonlysupports thewriteoperationandtherefore,theeighthdata bit,R/W,whichisusedtodefineareadorwrite operationwillbefixedata“0”state.IftheR/Wbit issetto1toexecuteareadoperation,itwillresult innooperation. • Thedeviceaddressbitsare“0111110”.When anaddressbyteissent,thedevicecomparesthe firstsevenbitsaftertheSTARTcondition.Ifthey match,thedeviceoutputsanAcknowledgeonthe SDAline. Slave Address 0 1 1 1 1 1 0 0 MSB LSB R/W=0 I2C Interface Write Operation Byte Write Operation • SingleCommandType ASingleCommandwriteoperationrequiresa STARTcondition,aslaveaddresswithawrite controlbit,acommandbyteandaSTOPcondition forasinglecommandwriteoperation. • CompoundCommandType ACompoundCommandwriteoperationrequires aSTARTcondition,aslaveaddresswithawrite controlbit,acommandbyte,uptotwocommand settingbytesandaSTOPconditionforacompound commandwriteoperation. • DisplayRAMSingleDataByte AdisplayRAMdatabytewriteoperationrequires aSTARTcondition,aslaveaddresswithawrite controlbit,avalidRegisterAddressbyte,aData byteandaSTOPcondition. Thestartaddresscanonlybesetfrom00Hto 1FH.Thestartaddresswhichisgreaterthan1FH willberegardedasacommand.Therefore,itis recommendedthatthestartaddressshouldbeset from00Hto1FH. Display RAM Page Write Operation AfteraSTARTconditiontheslaveaddresswitha writecontrolbitisplacedonthebusfollowedwith thespecifieddisplayRAMRegisterAddressofwhich thecontentsarewrittenintotheinternaladdress pointer.Thedatatobewrittenintothememorywill betransmittednext.Theinternaladdresspointerwill beincrementedby1aftera4-bitdataisshiftedin. Thentheacknowledgeclockpulsewillbereceived afteran8-bitdataisshifted.Aftertheinternaladdress pointreachesthemaximummemoryaddress,27H, theaddresspointerwillberesetto00H.Itisstrongly recommendedtowritethedisplayRAMdatafrom address00Hto27HusingtheDisplayRAMPage WriteOperation. |
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