87C196CA87C196CB

Symbol

Parameter

Test Conditions

Min

Typ

Max

Units

Input Leakage Current (Std Inputs)

g

10

m

A

Input Leakage Current (Port 0)

m

A

SLPINT (P54) and HLDA (P26)

20

V

Output High Voltage in RESET

Output High Voltage in RESET

V

10

pF

Weak Pullup Resistance

(Note 6)

150K

X

Reset Pullup Resistor

For CB

65K

180K

X

Reset Pullup Resistor CA

For CA

6K

65K

X

NOTES

1 All BD (bidirectional) pins except INST and CLKOUT INST and CLKOUT are excluded due to their not being weakly

pulled high in reset BD pins include Port1 Port2 Port3 Port4 Port5 and Port6 except SPLINT (P54) and HLDA (P26)

2 Standard input pins include XTAL1 EA RESET and Port 1256 when setup as inputs

3 All bidirectional IO pins when configured as Outputs (PushPull)

4 Device is static and should operate below 1 Hz but only tested down to 4 MHz

6 Typicals are based on limited number of samples and are not guaranteed The values listed are at room temperature and

7 Violating these specifications in reset may cause the device to enter test modes (P54 and P26)

8 When P0 is used as analog inputs refer to AD specifications for this characteristic

8XC196CB ADDITIONAL BUS TIMING MODES

The 8XC196CB device has 2 bus timing modes for

external memory interfacing

MODE 3

Mode 3 is the standard timing mode Use this mode

for systems that emulate the 8XC196KR bus tim-

ings

MODE 0

Mode 0 is the standard timing mode but 1 (mini-

mum) wait state is always inserted in external bus

cycles

15