80296SA datasheet(16/40 Pages) INTEL

16 / 40 page

PRELIMINARY

80296SA COMMERCIAL CHMOS 16-BIT MICROCONTROLLER

TXD

Transmit Serial Data

In serial I/O modes 1, 2, and 3, TXD transmits serial port output data. In mode 0, it is

the serial clock output.

TXD shares a package pin with P2.0.

PWR

Digital Supply Voltage

Connect each V

CC pin to the digital supply voltage.

GND

Digital Circuit Ground

These pins supply ground for the digital circuitry. Connect each V

SS pin to ground

through the lowest possible impedance path.

WR#

Write†

This active-low output indicates that an external write is occurring. This signal is

asserted only during external memory writes.

WR# shares a package pin with WRL#.

† Chip configuration register 0 (CCR0) determines whether this pin functions as

WR# or WRL#. CCR0.2 = 1 selects WR#; CCR0.2 = 0 selects WRL#.

WRH#

Write High†

During 16-bit bus cycles, this active-low output signal is asserted for high-byte writes

and word writes to external memory. During 8-bit bus cycles, WRH# is asserted for

all write operations.

WRH# shares a package pin with BHE#.

† Chip configuration registrer 0 (CCR0) determines whether this pin functions as

BHE# or WRH#. CCR0.2 = 1 selects BHE#; CCR0.2 = 0 selects WRH#.

WRL#

Write Low†

During 16-bit bus cycles, this active-low output signal is asserted for low-byte writes

and word writes to external memory. During 8-bit bus cycles, WRL# is asserted for

all write operations.

WRL# shares a package pin with WR#.

† Chip configuration register 0 (CCR0) determines whether this pin functions as

WR# or WRL#. CCR0.2 = 1 selects WR#; CCR0.2 = 0 selects WRL#.

XTAL1

Input Crystal/Resonator or External Clock Input

Input to the on-chip oscillator, internal phase-locked loop circuitry, and the internal

clock generators. The internal clock generators provide the peripheral clocks, CPU

clock, and CLKOUT signal. When using an external clock source instead of the on-

chip oscillator, connect the clock input to XTAL1. The external clock signal must

meet the V

IH specification for XTAL1.

XTAL2

Inverted Output for the Crystal/Resonator

Output of the on-chip oscillator inverter. Leave XTAL2 floating when the design uses

an external clock source instead of the on-chip oscillator.

Table 4. Signal Descriptions (Continued)

Name

Type

Description

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