MILITARY AND COMMERCIAL TEMPERATURE RANGES

OCTOBER 1995

©1995 Integrated Device Technology, Inc.

9.4

DSC-4646/3

Integrated Device Technology, Inc.

1

FAST CMOS

BUFFER/CLOCK DRIVER

FEATURES:

• 0.5 MICRON CMOS technology

• Guaranteed low skew < 600ps (max.)

• Very low duty cycle distortion < 700ps (max.)

• Low CMOS power levels

• TTL compatible inputs and outputs

• TTL level output voltage swings

• Two independent output banks with 3-state control

– One 1:5 Inverting bank

– One 1:5 Non-Inverting bank

• ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

• Available in DIP, SOIC, SSOP, QSOP, CERPACK and

IDT54/74FCT810BT/CT

LCC packages

• Military product compliant to MIL-STD-883, Class B

FUNCTIONAL BLOCK DIAGRAMS

3103 drw 02

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

DIP/SOIC/SSOP/QSOP/CERPACK

TOP VIEW

P20-1

D20-1

SO20-2

SO20-7

SO20-8

&

E20-1

GND

GND

GND

GND

5

5

3103 drw 01

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

INDEX

LCC

TOP VIEW

3

2

20 19

1

4

5

6

7

8

18

17

16

15

14

910 11 12 13

L20-2

GND

GND

GND

3103 drw 03

PIN CONFIGURATIONS

DESCRIPTION:

The IDT54/74FCT810BT/CT is a dual bank inverting/ non-

inverting clock driver built using advanced dual metal CMOS

technology. It consists of two banks of drivers, one inverting

and one non-inverting. Each bank drives five output buffers

from a standard TTL-compatible input. The IDT54/

74FCT810BT/CT have low output skew, pulse skew and

package skew. Inputs are designed with hysteresis circuitry

for improved noise immunity. The outputs are designed with

TTL output levels and controlled edge rates to reduce signal

noise. The part has multiple grounds, minimizing the effects of

ground inductance.