Integrated

Circuit

Systems, Inc.

General Description

Features

ICS9148-47

Block Diagram

9148-47 Rev D 08/04/98

Pin Configuration

28 pin SOIC

Pentium is a trademark on Intel Corporation.

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Generates system clocks for CPU, PCI, IOAPIC ,

14.314MHz,48and24MHz.

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Supports single or dual processor systems

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Skew from CPU (earlier) to PCI clock 1 to 4ns

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Separate 2.5V and 3.3V supply pins

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2.5V outputs: CPU, IOAPIC

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3.3V outputs: PCI, REF

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No power supply sequence requirements

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28 pin SOIC

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Spread Sectrum operation optional for PLL1

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CPU frequencies to 100MHz are supported.

The ICS9148-47 is part of a reduced pin count two-chip clock

solution for designs using an Intel BX style chipset.

Companion SDRAM buffers are ICS9179-11 and –12.

There are two PLLs, with the first PLL capable of spread

spectrum operation. Spread spectrum typically reduces system

EMI by 8-10dB. The second PLL provides support for USB

(48MHz) and 24MHz requirements. CPU frequencies up to

100MHz are supported.

selection, and spread spectrum operation to be programmed.

Clock outputs include two CPU (2.5V or 3.3V), seven PCI

(3.3V),oneREF(3.3V),oneIOAPIC(2.5Vor3.3V),one48MHz,

and one selectable 48/24MHz.

Ground Groups

GND = Ground Source Core

GND1=REF0,X1,X2

GND2=PCICLK_F,PCICLK(0:5)

GND3=48MHz

GNDL=CPUCLK(0:1)

Power Groups

VDD = Supply for PLL core

VDD1=REF0,X1,X2

VDD2=PCICLK_F,PCICLK(0:5)

VDD3=48MHz

VDDL=CPUCLK(0:1)

VDDL1=IOAPIC

ICS reserves the right to make changes in the device data identified in this

publication without further notice. ICS advises its customers to obtain the latest

version of all device data to verify that any information being relied upon by the

customer is current and accurate.