ICS1889 datasheet(16/35 Pages) ICST

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ICS1889

QuickPoll Status Register (register 17)

The QuickPoll status register is a 16-bit read only register

used to indicate the comprehensive status of the ICS1889. All

at run time are located in this register, even though some bits

duplicate functionality from other registers. This allows the

device status to be rapidly obtained with a single register

access.

The register is accessed via the management interface of the

MII. It can always be read and may be written by setting the

override bit in the Configuration Register (register 16, bit 15)

and then performing a write operation. It is initialized during a

power-up or reset to predefined default values.

QuickPoll Status Register (register 17)

BIT

Definition

When bit = 0

When bit = 1

Access

Default

Data Rate

Always a logic one

100 Mbps selected

Duplex

Half duplex selected

Full duplex selected

0 if PRIO=1 or

DPEN if PRIO=0

Reserved for ICS

Read unspecified

—

Reserved for ICS

Read unspecified

—

Reserved for ICS

Read unspecified

—

Receive Signal Error Signal

Loss of signal

RO/LH

PLL Lock Error

PLL locked

PLL failed to lock

RO/LH

False Carrier Detect

Normal carrier or idle

False carrier detected

RO/LH

Invalid Symbol

Valid symbols

Invalid symbol detected

RO/LH

Halt Symbol

Normal symbols

HALT symbol detected

RO/LH

Premature End

Normal stream

Stream with two IDLES

RO/LH

Reserved for ICS

Read unspecified

—

Reserved for ICS

Read unspecified

—

Priority Pin State

Hardware

Software

PRIO

Remote Fault

No remote fault detected

Remote fault detected

RO/LH

Link Status

Link is not valid

Link is valid

RO/LL

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