A7985ATR datasheet(29/44 Pages) STMICROELECTRONICS

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DocID023128 Rev 5

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A7985A

Application information

6.5

Thermal considerations

The thermal design is important to prevent the thermal shutdown of the device if the junction

temperature goes above 150 °C. The three different sources of losses within the device are:

conduction losses due to the not-negligible RDS(on) of the power switch; these are

equal to:

Equation 36

where D is the duty cycle of the application and the maximum RDS(on) overtemperature is

220 m

. Note that the duty cycle is theoretically given by the ratio between VOUT and VIN,

but actually it is quite higher to compensate the losses of the regulator. So the conduction

losses increase compared with the ideal case.

switching losses due to Power MOSFET turn-on and turn-off; these can be

calculated as:

Equation 37

where TRISE and TFALL are the overlap times of the voltage across the power switch (VDS)

and the current flowing into it during turn-on and turn-off phases, as shown in Figure 16.

TSW is the equivalent switching time. For this device the typical value for the equivalent

switching time is 40 ns.

Quiescent current losses, calculated as:

Equation 38

where IQ is the quiescent current (IQ = 2.4 mA).

The junction temperature TJ can be calculated as:

Equation 39

where TA is the ambient temperature and PTOT is the sum of the power losses just seen.

Rth(JA) is the equivalent thermal resistance junction to ambient of the device; it can be

calculated as the parallel of many paths of heat conduction from the junction to the ambient.

For this device the path through the exposed pad is the one conducting the largest amount

of heat. The Rth(JA) measured on the demonstration board described in the following

paragraph is about 40 °C/W for the HSOP8 package.

PON

RDS on



IOUT



2 D



PSW

VIN IOUT

TRISE TFALL



------------------------------------------- Fsw





VIN IOUT TSW FSW





VIN IQ



TA RthJA PTOT



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