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A7985ATR bảng dữ liệu(PDF) 6 Page - STMicroelectronics |
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A7985ATR bảng dữ liệu(HTML) 6 Page - STMicroelectronics |
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6 / 44 page ![]() Pin settings A7985A 6/44 DocID023128 Rev 5 1 Pin settings 1.1 Pin connection Figure 2. Pin connection (top view) 1.2 Pin description Table 1. Pin description N. Type Description 1 OUT Regulator output. 2 SYNCH Master/slave synchronization. When it is left floating, a signal with a phase shift of half a period in respect to the power turn-on is present at the pin. When connected to an external signal at a frequency higher than the internal one, the device is synchronized by the external signal, with zero phase shift. Connecting together the SYNCH pins of two devices, the one with the higher frequency works as master and the other as slave; so the two power turn-ons have a phase shift of half a period. 3EN A logical signal (active high) enables the device. With EN higher than 1.2 V the device is ON and with EN lower than 0.63 V the device is OFF. 4 COMP Error amplifier output to be used for loop frequency compensation. 5FB Feedback input. Connecting the output voltage directly to this pin the output voltage is regulated at 0.6 V. To have higher regulated voltages an external resistor divider is required from VOUT to the FB pin. 6FSW The switching frequency can be increased connecting an external resistor from the FSW pin and ground. If this pin is left floating the device works at its free-running frequency of 250 KHz. 7 GND Ground. 8VCC Unregulated DC input voltage. |
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