HT9580 datasheet(5/63 Pages) HOLTEK

5 / 63 page

Pin No.

Pin Name

I/O

Description

BAL

Battery voltage detector input with pull-high resistor.

SRDY

SPI slave ready ¾ This slave ready pin is a Schmitt trigger input

with pull-high resistor. When the slave initiates the SPI transfer,

a high to low transition activates an interrupt. When the master

initiates the SPI transfer, a high to low transition trigger the

master to start the transfer.

BAF

Battery fail indication input, active low.

DA_OUT

D/A converter output. This pin is an 8-bit D/A analog output

RSSI

RSSI output from IF circuit. This pin should be pulled high or low

externally when this pin is not used.

POCSAG code input serial data. CMOS input with pull-high re-

sistor.

MISO

SPI master-in-slave-out ¾ this is the data input with pull-high

resistor for SPI communications.

BS3

PLL power control enable, CMOS output

MOSI

SPI master-out-slave-in ¾ this is the data output for SPI commu-

nications.

BS2

RF quick charge control enable, CMOS output

SCK

I/O

SPI serial clock ¾ the SCK signal is used to synchronize the data

transfer. If HT9580 is in the master mode, the SCK is output

clock. Otherwise, SCK is input clock if HT9580 is in the slave

mode.

BS1

Pager receiver power control enable output, CMOS output

SPI slave select ¾ this signal is used to enable the SPI slave for

transfer.

Decoder test mode input pin, active low with pull-high resistor.

72~67

PA0~PA5

I/O

General Input/Output Port A. These ports can be programmed to

have a wake-up capability for applications in keyboard operations

or as normal I/O. Also the input cell structures are all Schmitt

trigger types and can be selected between CMOS or CMOS with

pull-high resistors.

RESET

Schmitt trigger reset input, active low.

TSC

mC test mode input pin, active low with internal pull-high resis-

tor. The test circuit will be activated when this pin pulls low.

TS1

Decoder test mode input pin, active low with pull-high resistor.

The internal test mode will be activated when this pin pulls low.

OSC1

OSC2

OSC1 and OSC2 are connected to an RC network to form a main

clock oscillator

X1 and X2 are connected to a crystal to form an internal low power

clock oscillator (32.768kHz, 76.8kHz, or 153.6kHz)

HT9580

April 28, 2000

Preliminary

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