HT9480 datasheet(25/57 Pages) HOLTEK

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• Decoder control address

The decoder control address (1EH) contains a

data ready flag (DR), a battery low flag (BL),

an out of range flag (OR), a battery fail flag

(BF), a decoder standby flag (STB), a call

termination indication flag (CT), a decoder

software reset (RES), and a decoder on/off

control bit (ON). It not only records the status

information but controls the operation of the

decoder.

Any data written to the decoder control ad-

dress cannot change the OR, BF, STB and CT

flags.

If the status of the battery fail (BF) changes

from “1” to “0”, the following conditions occur.

• The pager controller generates an interrupt if

the value of the data ready interrupt flag is “1”.

• The pager controller does not generate an

interrupt and no data is transmitted if the

value of the data ready interrupt flag is “0”.

On the other hand, if the status of the battery

fail (BF) changes from “0” to “1”, the internal

node PA.7 of the pager controller will supply a

wake-up function.

After the decoder asserts the data transfer

request, the data ready interrupt is generated

and the DR bit (bit 7 of 1EH) is cleared low;

then the data ready interrupt subroutine runs

to process the call data and resets the DR bit

high.

Decoder interface

HT9480

23th Feb ’98

HT9480 bảng dữ liệu(PDF) 25 Page - Holtek Semiconductor Inc