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PCF8562 bảng dữ liệu(PDF) 23 Page - NXP Semiconductors |
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PCF8562 bảng dữ liệu(HTML) 23 Page - NXP Semiconductors |
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23 / 44 page ![]() PCF8562 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6 — 16 June 2011 23 of 43 NXP Semiconductors PCF8562 Universal LCD driver for low multiplex rates [1] The possibility to disable the display allows implementation of blinking under external control. [2] Not applicable for static drive mode. Table 11. Mode-set command bit description Bit Symbol Value Description 7C 0, 1see Table 10 6, 5 - 10 fixed value 4 - - unused 3E display status 0 disabled (blank)[1] 1 enabled 2B LCD bias configuration[2] 0 1⁄3 bias 1 1⁄2 bias 1 to 0 M[1:0] LCD drive mode selection 01 static; BP0 10 1:2 multiplex; BP0, BP1 11 1:3 multiplex; BP0, BP1, BP2 00 1:4 multiplex; BP0, BP1, BP2, BP3 Table 12. Load-data-pointer command bit description Bit Symbol Value Description 7C 0, 1see Table 10 6, 5 - 00 fixed value 4 to 0 P[4:0] 00000 to 11111 5 bit binary value, 0 to 31; transferred to the data pointer to define one of 32 display RAM addresses Table 13. Device-select command bit description Bit Symbol Value Description 7C 0, 1see Table 10 6 to 3 - 1100 fixed value 2 to 0 A[2:0] 000 to 111 3 bit binary value, 0 to 7; transferred to the subaddress counter to define one of eight hardware subaddresses |
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