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LM3555TLE bảng dữ liệu(PDF) 19 Page - Texas Instruments |
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LM3555TLE bảng dữ liệu(HTML) 19 Page - Texas Instruments |
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19 / 33 page  IC1 IC0 VO1 VO0 FT3 FT2 FT1 FT0 Indicator and Timer Register Address: 0x02 Default: 0 0 0 0 1 1 1 1 Definition: RF3 RF2 RF1 RF1 DR3 DR2 DR1 DR0 Version Control Register Address: 0x01 Default: 0 0 0 0 # # # # Definition: ADR6 bit7 ADR5 bit6 ADR4 bit5 ADR3 bit4 ADR2 bit3 ADR1 bit2 ADR0 bit1 R/W bit0 MSB LSB 0 0 0 1 1 0 0 I 2 C Slave Address (chip address) start msb Chip Address lsb w ack msb Register Add lsb ack msb DATA lsb ack stop ack from slave ack from slave ack from slave SCL SDIO start Id = 30h w ack addr = 04h ack ack data = 08h stop LM3555 www.ti.com SNVS594E – JANUARY 2009 – REVISED NOVEMBER 2011 w = write (SDA = "0") ack = acknowledge (SDA pulled down by the slave) id = chip address, 30h for LM3555 Figure 3. Write Cycle I 2C-COMPATIBLE CHIP ADDRESS The chip address for LM3555 is 0110000, or 30hex. INTERNAL REGISTERS OF LM3555 Register Internal Hex Address Power On Value Version Control Register 0x01 0000 1100 Indicator and Timer Register 0x02 0000 1111 Current Set Register 0x03 0110 1001 Control Register 0x04 1011 0100 Fault Register 0x05 0000 1000 REGISTER DEFINITIONS BOLD TABLE VALUES = Default Register Settings RF3–RF0: Unused DR3–DR0: Design Revision = 1100 IC1–IC0: Indicator LED current control bits. VO1-VO0: VREF Offset Adjustment bits. Used for diode detection. FT3-FT0: Software Flash Timer Duration Control bits. Copyright © 2009–2011, Texas Instruments Incorporated Submit Documentation Feedback 19 Product Folder Links: LM3555 |
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