5

* This specification are subject to be changed without notice.

9.14.2001

EM83040B

LCD CONTROLLER

Preliminary

Preliminary

Preliminary

Preliminary

Preliminary

PIN DESCRIPTIONS

Symbol

I/O

Function

VDD

Power

System power supply

GND

Power

Ground

VOUT

Power

Voltage converter input/output pin

Connect this pin to GND through capacitor

EN=1,VOUT=VDD

VSS4

Power

Step-up capacitor

EN=1, VSS4=VDD

VSS3

Power

Step-up capacitor

EN=1, VSS3=VDD

VSS2+

Power

Step-up capacitor

EN=1, VSS2=VDD

VSS2-

Power

Step-up capacitor

VREG

Power

Output voltage regulator terminal. Provides the voltage between V1 and GND

through a resistive voltage divider.

MAIN

I

Master or slave control signal.

MAIN=1, master unit

MAIN=0, slave unit

EN

I

This pin control whole chip power. This chip will work when this pin is connected

to ground. And whole chip will disable when connect to VDD voltage.

EN=0 and MAIN=1 the chip will generate VSS2+, VSS2-

VSS3, VSS4, VOUT, LOAD signal and internal RC clock.

EN=1, standby mode

M1

I

Mode select

M0

I

Mode select

RAMEN

RAM read and write control signal.

1 => can not read and write. 0=> can read and write.

RAMADS

RAM data select signal

1=> RAM Data, 0=>Address

RAMW

RAM write signal, low write

RAMR

RAM read signal, low read

RAMD3~RAM

RAM data or address bus

D0

LOAD

I/O

LCD load signal between one COMMON signal to another.

MAIN=1, the master unit will output LOAD signal.

MAIN=0, the slave will accept the signal from master unit.

CA

I

Coupling capacitor

CB

I

Coupling capacitor

V1~V5

I

Reference voltage input, highest V1

°K lowest V5

O1~O80

O

LCD waveform output