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HM5259165B bảng dữ liệu(PDF) 25 Page - Elpida Memory |
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HM5259165B bảng dữ liệu(HTML) 25 Page - Elpida Memory |
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25 / 63 page ![]() HM5259165B/HM5259805B/HM5259405B-75/A6 Data Sheet E0118H10 25 Auto Precharge Read with auto-precharge: In this operation, since precharge is automatically performed after completing a read operation, a precharge command need not be executed after each read operation. The command executed for the same bank after the execution of this command must be the bank active (ACTV) command. In addition, an interval defined by l APR is required before execution of the next command. CAS latency Precharge start cycle 3 2 cycle before the final data is output 2 1 cycle before the final data is output Burst Read (Burst Length = 4) CLK lAPR lRAS lAPR CL=2 Command CL=3 Command DQ (input) DQ (input) Note: Internal auto-precharge starts at the timing indicated by " ". And an interval of tRAS (lRAS) is required between previous active (ACTV) command and internal precharge " ". ACTV READ A ACTV out3 out2 out1 out0 lRAS ACTV READ A ACTV out3 out2 out1 out0 |
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