DS80C320 datasheet(18/42 Pages) DALLAS

18 / 42 page

DS80C320/DS80C323

18 of 42

TIMED ACCESS PROTECTION

Selected SFR bits are critical to operation, making it desirable to protect against an accidental write

operation. The Timed Access procedure prevents an errant CPU from accidentally altering a bit that

would cause difficulty.

The Timed Access procedure requires that the write of a protected bit be

preceded by the following instructions:

MOV

0C7h, #0AAh

MOV

0C7h, #55h

By writing an AAh followed by a 55h to the Timed Access register (location C7h), the hardware opens a

three-cycle window that allows software to modify one of the protected bits. If the instruction that seeks

to modify the protected bit is not immediately proceeded by these instructions, the write will not take

effect. The protected bits are:

EXIF.0

BGS Band-gap Select

WDCON.6

POR Power-on Reset flag

WDCON.1

EWT Enable Watchdog

WDCON.0

RWT Reset Watchdog

WDCON.3

WDIF Watchdog Interrupt Flag

SPECIAL FUNCTION REGISTERS

Most special features of the DS80C320/DS80C323 or 80C32 are controlled by bits in special function

registers (SFRs). This allows the device to add many features but use the same instruction set. When

writing software to use a new feature, the SFR must be defined to an assembler or compiler using an

equate statement. This is the only change needed to access the new function. The DS80C320/DS80C323

duplicates the SFRs that are contained in the standard 80C32. Table 6 shows the register addresses and bit

locations. Many are standard 80C32 registers. The High-Speed Microcontroller User’s Guide describes

all SFRs.

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