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DS80C320 bảng dữ liệu(PDF) 9 Page - Dallas Semiconductor |
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DS80C320 bảng dữ liệu(HTML) 9 Page - Dallas Semiconductor |
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9 / 42 page ![]() DS80C320/DS80C323 9 of 42 Data Transfer Instructions: MOV A, Rn 1 4 MOVC A, @A+DPTR 1 12 MOV A, direct 2 8 MOVC A, @A+PC 1 12 MOV A, @Ri 1 4 MOVX A, @Ri 1 8-36* MOV A, #data 2 8 MOVX A, @DPTR 1 8-36* MOV Rn, A 1 4 MOVX @Ri, A 1 8-36* MOV Rn, direct 2 8 MOVX @DPTR, A 1 8-36* MOV Rn, #data 2 8 PUSH direct 2 8 MOV direct, A 2 8 POP direct 2 8 MOV direct, Rn 2 8 XCH A, Rn 1 4 MOV direct1, direct2 3 12 XCH A, direct 2 8 MOV direct, @Ri 2 8 XCH A, @Ri 1 4 MOV direct, #data 3 12 XCHD A, @Ri 1 4 MOV @Ri, A 1 4 MOV @Ri, direct 2 8 MOV @Ri, #data 2 8 MOV DPTR, #data 16 3 12 *User Selectable Bit Manipulation Instructions: CLR C 1 4 ANL C, bit 2 8 CLR bit 2 8 ANL C, bit 2 8 SETB C 1 4 ORL C, bit 2 8 SETB bit 2 8 ORL C, bit 2 8 CPL C 1 4 MOV C, bit 2 8 CPL bit 2 8 MOV bit, C 2 8 Program Branching Instructions: ACALL addr 11 2 12 CJNE A, direct, rel 3 16 LCALL addr 16 3 16 CJNE A, #data, rel 3 16 RET 1 16 CJNE Rn, #data, rel 3 16 RETI 1 16 CJNE Ri, #data, rel 3 16 AJMP addr 11 2 12 NOP 1 4 LJMP addr 16 3 16 JC rel 2 12 SJMP rel 2 12 JNC rel 2 12 JMP @A+DPTR 1 12 JB bit, rel 3 16 JZ rel 2 12 JNB bit, rel 3 16 JNZ rel 2 12 JBC bit, rel 3 16 DJNZ Rn, rel 2 12 DJNZ direct, rel 3 16 The table above shows the speed for each class of instruction. Note that many of the instructions have multiple opcodes. There are 255 opcodes for 111 instructions. Of the 255 opcodes, 159 are three times faster than the original 80C32. While a system that emphasizes those instructions will see the most improvement, the large total number that receive a 3 to 1 improvement assure a dramatic speed increase for any system. The speed improvement summary is provided below. |
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