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DS1721 bảng dữ liệu(PDF) 16 Page - Dallas Semiconductor

tên linh kiện DS1721
Giải thích chi tiết về linh kiện  2-Wire Digital Thermometer and Thermostat
PDF  16 Pages
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nhà sản xuất  DALLAS [Dallas Semiconductor]
Trang chủ  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS1721 bảng dữ liệu(HTML) 16 Page - Dallas Semiconductor

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NOTES:
1. All voltages are referenced to ground.
2. I/O pins of fast mode devices must not obstruct the SDA and SCL lines if VDD is switched off.
3. IDD specified with TOUT pin open.
4. IDD specified with VDD at 5.0V and SDA,SCL = 5.0V, 0°C to 70°C.
5. See typical accuracy curves for specification limits outside the temperature range indicated.
6. After this period, the first clock pulse is generated.
7. The maximum tHD:DAT has only to be met if the device does not stretch the LOW period (tLOW) of the
SCL signal.
8. A fast mode device can be used in a standard mode system, but the requirement tSU:DAT >250 ns must
then be met. This will automatically be the case if the device does not stretch the LOW period of the
SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next
data bit to the SDA line tR MAX+tSU:DAT 1000+250 = 1250 ns before the SCL line is released.
9. Cb - total capacitance of one bus line in pF.
TIMING DIAGRAMS Figure 7
TYPICAL DS1721 THERMOMETER PERFORMANCE CURVE Figure 8
TBD



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