AT25DF641_13 datasheet(38/56 Pages) ETC2

38 / 56 page

AT25DF641

3680F–DFLASH–4/10

10.2. Write Status Register Byte 1

The Write Status Register Byte 1 c ommand is used to modify the SPRL bit of the Status Register and/or to

perform a Global Protect or Global Unprotect operation. Before the Write Status Register Byte 1 command can be

issued, the Write Enable command must have been previously issued to set the WEL bit in the Status Register to

a logical “1”.

To issue the Write Status Register Byte 1 command, the

pin must first be asserted and the opcode of 01h

must be clocked into the device followed by one byte of data. The one byte of data consists of the SPRL bit value,

a don’t care bit, four data bits to denote whether a Global Protect or Unprotect should be performed, and two

additional don’t care bits (see Table 10-3). Any additional data bytes that are sent to the device will be ignored.

When the

pin is deasserted, the SPRL bit in the Status Register will be modified, and the WEL bit in the Status

bit before the Write Status Register Byte 1 command was executed (the prior state of the SPRL bit) will determine

whether or not a Global Protect or Global Unprotect will be performed. Please refer to “Global Protect/Unprotect”

on page 24 for more details.

The complete one byte of data must be clocked into the device before the

pin is deasserted, and the

must be deasserted on even byte boundaries (multiples of eight bits); otherwise, the device will abort the

operation, the state of the SPRL bit will not change, no potential Global Protect or Unprotect will be performed,

and the WEL bit in the Status Register will be reset back to the logical “0” state.

If the

pin is asserted, then the SPRL bit can only be set to a logical “1”. If an attempt is made to reset the

SPRL bit to a logical “0” while the

pin is asserted, then the Write Status Register Byte 1 command will be

ignored, and the WEL bit in the Status Register will be reset back to the logical “0” state. In order to reset the

SPRL bit to a logical “0”, the

pin must be deasserted.

Table 10-3.

Write Status Register Byte 1 Format

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

SPRL

Global Protect/Unprotect

Figure 10-2.

Write Status Register Byte 1

SCK

MS B

OPCODE

10 11

14 15

MS B

S TATUS R E GIS TE R IN

BYTE 1

HIG H-IMP E DANC E

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