CS4812 datasheet(10/36 Pages) CIRRUS

10 / 36 page

CS4812

DS291PP3

SWITCHING CHARACTERISTICS - CONTROL PORT - I2C® SLAVE

(TA = 25 °C; VA, VD = 5 V; Inputs: Logic 0 = DGND, Logic 1 = VD, CL = 30 pF)

Notes: 17. Use of the I2C bus interface requires a license from Philips. I2C is a registered trademark of Philips

Semiconductors.

18. Not tested.

19. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.

20. DSPCLK frequency is twice the DSP instruction rate.

Parameter

Symbol

Min

Max

Units

I2C® Slave Mode (SPI/I2C = 1, SCPM/S = 0) (Note 17)

SCL Clock Frequency

fscl

-100

kHz

Bus Free Time Between Transmissions

tbuf

4.7

µs

Start Condition Hold Time (prior to first clock pulse)

thdst

4.0

µs

SCL Low Time

tlow

4.7

µs

SCL High Time

thigh

4.0

µs

RST rising to start condition

(Note18)

tsrs

SDA Hold Time from SCL Falling

(Note 19)

thdd

µs

Rise Time of Both SDA and SCL

-1

µs

Fall Time of Both SDA and SCL

-300

SCL Falling to CS4812 ACK

tsca

-1.3

µs

SCL Falling to SDA Valid During READ

tscsdv

-1.5

µs

Time from SCL Rising to REQ Rising

(Note 20)

tscrh

-2*DSPCLK+10

Rise Time for REQ

trr

-100

Fall Time for REQ

trf

-100

Setup Time for Stop Condition

tsusp

4.7

µs

Setup Time for Repeated Start

tsust

4.7

µs

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