OUT B

1

2

3

4

5

6

7

8

OUT A

-IN A

+IN A

V

-

V

+

-IN B

+IN B

-

+

+

-

A

B

OUT A

OUT B

1

2

8

-IN

+IN

V-

V+

-IN

+IN

+

-

+

-

A

B

7

6

5

4

3

16

15

14

13

12

11

10

9

NC

NC

NC

NC

*

*

*

*

LM7372

SNOS926E – MAY 1999 – REVISED MARCH 2013

www.ti.com

Connection Diagrams

Figure 2. 16-Pin SOIC, Top View

Figure 3. 8-Pin SO PowerPAD, Top View

NOTE

floating.

(1)

for the 16-Pin SOIC package. With a total area of 4sq. in of 1oz CU connected to pins 1,6,8,9 & 16,

decreased to 70°C/W. 8-Pin SO PowerPAD package

Table 2).

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

2

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