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ST1S40 bảng dữ liệu(PDF) 17 Page - STMicroelectronics

tên linh kiện ST1S40
Giải thích chi tiết về linh kiện  3 A DC step-down switching regulator
PDF  29 Pages
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ST1S40
Application information
29
6.4
Thermal dissipation
The thermal design is important in order to prevent thermal shutdown of the device if
junction temperature goes above 150 °C. The three different sources of losses within the
device are:
a)
conduction losses due to the ON resistance of high side switch (RHS) and low side
switch (RLS); these are equal to:
Equation 22
where D is the duty cycle of the application. Note that the duty cycle is theoretically given by
the ratio between VOUT and VIN, but is actually slightly higher to compensate the losses of
the regulator.
b)
switching losses due to high side Power MOSFET turn ON and OFF; these can be
calculated as:
Equation 23
where TRISE and TFALL are the overlap times of the voltage across the high side power
switch (VDS) and the current flowing into it during turn ON and turn OFF phases, as shown
in Figure 7. TSW is the equivalent switching time. For this device the typical value for the
equivalent switching time is 20 ns.
c)
Quiescent current losses, calculated as:
Equation 24
where IQ is the quiescent current (IQ = 2.5 mA maximum).
The junction temperature TJ can be calculated as:
Equation 25
where TA is the ambient temperature and PTOT is the sum of the power losses just seen.
RthJA is the equivalent thermal resistance junction to ambient of the device; it can be
calculated as the parallel of many paths of heat conduction from the junction to the ambient.
For this device the path through the exposed pad is the one conducting the largest amount
of heat. The RthJA measured on the demonstration board described in the following
paragraph is about 40 °C/W for the VFQFPN and HSOP packages and about 55 °C/W for
the SO8-BW package.
PCOND
RHS IOUT
2 DR
LS IOUT
2
1D


+

=
PSW
VIN IOUT
TRISE TFALL
+

2
------------------------------------------- Fsw

VIN IOUT TSW FSW

==
PQ
VIN IQ
=
TJ
TA RthJA PTOT
+
=



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