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PCF8583 bảng dữ liệu(PDF) 11 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  Clock and calendar with 240 x 8-bit RAM
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PCF8583 bảng dữ liệu(HTML) 11 Page - NXP Semiconductors

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PCF8583
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 06 — 6 October 2010
11 of 37
NXP Semiconductors
PCF8583
Clock and calendar with 240 x 8-bit RAM
7.7 Timer
The timer (location 07h) is enabled by setting the control and status register to
XX0X X1XX. The timer counts up from 0 (or a programmed value) to 99. On overflow, the
timer resets to 0. The timer flag (LSB of control and status register) is set on overflow of
the timer. This flag must be reset by software. The inverted value of this flag can be
transferred to the external interrupt by setting bit 3 of the alarm control register.
Additionally, a timer alarm can be programmed by setting the timer alarm enable (bit 6 of
the alarm control register). When the value of the timer equals a pre-programmed value in
the alarm timer register (location 0Fh), the alarm flag is set (bit 1 of the control and status
register). The inverted value of the alarm flag can be transferred to the external interrupt
by enabling the alarm interrupt (bit 6 of the alarm control register).
Resolution of the timer is programmed via the 3 LSBs of the alarm control register (see
Figure 12).
Fig 11. Selection of alarm weekdays
765
4321
0
MSB
LSB
013aaa375
memory location 0Eh (alarm_weekday/month)
weekday 0 enabled when set
weekday 1 enabled when set
weekday 2 enabled when set
weekday 3 enabled when set
weekday 4 enabled when set
weekday 5 enabled when set
weekday 6 enabled when set
not used



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