CSD87384M datasheet(4/21 Pages) TI1

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CSD87384M

SLPS415B – SEPTEMBER 2013 – REVISED JANUARY 2014

www.ti.com

Electrical Characteristics

TA = 25°C (unless otherwise stated)

Q1 Control FET

Q2 Sync FET

PARAMETER

TEST CONDITIONS

UNIT

MIN

TYP

MAX

MIN

TYP

MAX

Static Characteristics

BVDSS

Drain-to-Source Voltage

VGS = 0 V, IDS = 250 μA

Drain-to-Source Leakage

IDSS

VGS = 0 V, VDS = 24 V

μA

Current

Gate-to-Source Leakage

IGSS

VDS = 0 V, VGS = 10 V

100

Current

Gate-to-Source Threshold

VGS(th)

VDS = VGS, IDS = 250 μA

1.1

1.9

1.1

1.7

Voltage

VGS = 4.5 V, IDS = 25 A

7.5

8.9

2.15

2.6

RDS(on)

Drain-to-Source On Impedance

Ω

VGS = 8 V, IDS = 25 A

6.4

7.7

1.95

2.4

gfs

Transconductance

VDS = 10 V, IDS = 25 A

240

Dynamic Characteristics

CISS

Input Capacitance (1)

884

1150

3760

4890

COSS

Output Capacitance (1)

VGS = 0 V, VDS = 15 V,

452

588

1110

1440

f = 1MHz

Reverse Transfer Capacitance

CRSS

19.4

25.2

114

(1)

Series Gate Resistance (1)

1.0

2.0

0.7

1.4

Gate Charge Total (4.5 V) (1)

7.1

9.2

Qgd

Gate Charge – Gate to Drain

1.5

8.6

VDS = 15 V,

IDS = 25 A

Qgs

Gate Charge – Gate to Source

2.7

8.6

Qg(th)

Gate Charge at Vth

1.3

5.4

QOSS

Output Charge

VDD = 12 V, VGS = 0 V

11.3

td(on)

Turn On Delay Time

8.7

17.5

Rise Time

VDS = 15 V, VGS = 4.5 V,

IDS = 25 A, RG = 2 Ω

td(off)

Turn Off Delay Time

Fall Time

7.6

8.2

Diode Characteristics

VSD

Diode Forward Voltage

IDS = 25 A, VGS = 0 V

0.85

0.80

Qrr

Reverse Recovery Charge

Vdd = 15 V, IF = 25 A,

di/dt = 300 A/

μs

trr

Reverse Recovery Time

(1)

Specified by design

Max RθJA = 67°C/W

Max RθJA = 153°C/W

when mounted on

1 inch2 (6.45 cm2) of

minimum pad area of

2-oz. (0.071-mm thick)

Cu.

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