IRFS7440PbF datasheet(8/11 Pages) IRF

8 / 11 page

IRFS/SL7440PbF

www.irf.com

October 10, 2012

Fig 23a. Switching Time Test Circuit

Fig 23b. Switching Time Waveforms

Fig 22b. Unclamped Inductive Waveforms

Fig 22a. Unclamped Inductive Test Circuit

V(BR)DSS

IAS

0.01



D.U.T

VDS

- VDD

DRIVER

15V

20V

VGS

Fig 24a. Gate Charge Test Circuit

Fig 24b. Gate Charge Waveform

Vds

Vgs

Vgs(th)

Qgs1 Qgs2

Qgd

Qgodr

Fig 22.

Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

Circuit Layout Considerations

 Low Stray Inductance

Ground Plane

Low Leakage Inductance

Current Transformer

P.W.

Period

di/dt

Diode Recovery

dv/dt

Ripple

 5%

Body Diode

Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

VGS=10V

VDD

ISD

Driver Gate Drive

D.U.T. ISD Waveform

D.U.T. VDS Waveform

Inductor Curent

D =

P.W.

Period

* VGS = 5V for Logic Level Devices

VDD

dv/dt controlled by RG

Driver same type as D.U.T.

ISD controlled by Duty Factor "D"

D.U.T. - Device Under Test

D.U.T

Inductor Current

D.U.T.

VDS

3mA

VGS

F

50K



F

12V

Current Regulator

Same Type as D.U.T.

Current Sampling Resistors

VDS

90%

10%

VGS

td(on)

td(off) tf

VDS

Pulse Width µs

Duty Factor 

VGS

D.U.T.

10V

- VDD

VGS

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