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MACH211SP-7VC bảng dữ liệu(PDF) 18 Page - Advanced Micro Devices |
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MACH211SP-7VC bảng dữ liệu(HTML) 18 Page - Advanced Micro Devices |
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18 / 37 page ![]() 18 MACH211SP-10/12 (Ind) Notes: 1. These parameters are not 100% tested, but are evaluated at initial characterization and at any time the design is modified where capacitance may be affected. 2. See Switching Test Circuit for test conditions. 3. If a signal is powered-down, this parameter must be added to its respective high-speed parameter. tSLL Setup Time from Input, I/O, or Feedback Through Transparent Input Latch to Output Latch Gate 8.5 10.5 ns tIGS Input Latch Gate to Output Latch Setup 11 13.5 ns tWIGL Input Latch Gate Width LOW 5 6 ns tPDLL Input, I/O, or Feedback to Output Through Transparent Input and Output Latches 14 17 ns tAR Asynchronous Reset to Registered or Latched Output 15 19.5 ns tARW Asynchronous Reset Width (Note 1) 10 12 ns tARR Asynchronous Reset Recovery Time (Note 1) 10 10 ns tAP Asynchronous Preset to Registered or Latched Output 15 18 ns tAPW Asynchronous Preset Width (Note 1) 10 12 ns tAPR Asynchronous Preset Recovery Time (Note 1) 10 10 ns tEA Input, I/O, or Feedback to Output Enable (Note 1) 15 15 ns tER Input, I/O, or Feedback to Output Disable (Note 1) 15 15 ns tLP tPD Increase for Powered-down Macrocell (Note 3) 10 10 ns tLPS tS Increase for Powered-down Macrocell (Note 3) 10 10 ns tLPCO tCO Increase for Powered-down Macrocell (Note 3) 0 0 ns tLPEA tEA Increase for Powered-down Macrocell (Note 3) 10 10 ns SWITCHING CHARACTERISTICS over INDUSTRIAL operating ranges (Note 2) (continued) Parameter Symbol Parameter Description -10 -12 Unit Min Max Min Max |
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