AM186 datasheet(108/112 Pages) AMD

108 / 112 page

Index-2

Am186™CC Communications Controller Data Sheet

DC characteristics, 60

demonstration board products, 13

DEN/PIO5, 31

description, 1

functional, 40

direct memory access, 54

DMA

Am186ER maximum transfer rates, 55

asynchronous serial port transfers, 55

channel control registers, 55–56

operation, 55

priority, 55–56

transfers through serial port, 56

unit block diagram, 56

documentation

See customer support.

DRQ1–DRQ0, 32

DT/R/PIO4, 32

emulator and debug modes, 52

internal memory disable, 52

show read enable, 52

external source clock, 45

features

3.3-V operation with 5-V-tolerant I/O, 14

available native development tools, applications, and

system software, 1

enhanced bus interface, 1

enhanced functionality, 1, 14

enhanced integrated peripherals, 1

enhanced performance, 14

faster access to memory and clock input modes, 1

integrated RAM, 14

memory integration, 1

software-compatible, 1

x86 software compatibility, 14

four-pin interface, 57

functional description, 40

GND, 32

HLDA, 32

HOLD, 32

hotline and world wide web support, 13

I/O circuitry, 59

I/O space, 40

industrial operating ranges, 60

initialization and processor reset, 48

input/output circuitry, 59

INT0, 32

INT1/SELECT, 32

INT2/INTA0/PIO31, 33

INT3/INTA1/IRQ, 33

INT4/PIO30, 33

interaction with external RAM, 52

internal memory, 52

internal memory disable, 52

internal RAM show read cycle waveform, 77

interrupt acknowledge cycle (25 and 33 MHz), 87

interrupt acknowledge cycle (40 and 50 MHz), 88

interrupt acknowledge cycle waveforms, 89

interrupt control unit, 53

programming, 53

junction temperature calculation, 62

LCS/ONCE0, 33

literature

See customer support.

logic diagram

ARDY and SRDY synchronization, 49

low memory chip select, 51

low-voltage operation, 57

low-voltage standard, 59

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