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PIC18F8722IPTSQTP bảng dữ liệu(PDF) 41 Page - Microchip Technology |
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PIC18F8722IPTSQTP bảng dữ liệu(HTML) 41 Page - Microchip Technology |
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41 / 446 page ![]() © 2008 Microchip Technology Inc. DS39646C-page 39 PIC18F8722 FAMILY REGISTER 2-2: OSCCON: OSCILLATOR CONTROL REGISTER R/W-0 R/W-1 R/W-0 R/W-0 R(1) R-0 R/W-0 R/W-0 IDLEN IRCF2 IRCF1 IRCF0 OSTS IOFS SCS1 SCS0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7 IDLEN: Idle Enable bit 1 = Device enters an Idle mode when a SLEEP instruction is executed 0 = Device enters Sleep mode when a SLEEP instruction is executed bit 6-4 IRCF<2:0>: Internal Oscillator Frequency Select bits(5) 111 = 8 MHz (INTOSC drives clock directly) 110 = 4 MHz 101 = 2 MHz 100 = 1 MHz(3) 011 = 500 kHz 010 = 250 kHz 001 = 125 kHz 000 = 31 kHz (from either INTOSC/256 or INTRC directly)(2) bit 3 OSTS: Oscillator Start-up Time-out Status bit(1) 1 = Oscillator Start-up Timer (OST) time-out has expired; primary oscillator is running 0 = Oscillator Start-up Timer (OST) time-out is running; primary oscillator is not ready bit 2 IOFS: INTOSC Frequency Stable bit 1 = INTOSC frequency is stable 0 = INTOSC frequency is not stable bit 1-0 SCS<1:0>: System Clock Select bits(4) 1x = Internal oscillator block 01 = Secondary (Timer1) oscillator 00 = Primary oscillator Note 1: Reset state depends on state of the IESO Configuration bit. 2: Source selected by the INTSRC bit (OSCTUNE<7>), see text. 3: Default output frequency of INTOSC on Reset. 4: Modifying the SCS<1:0> bits will cause an immediate clock source switch. 5: Modifying the IRCF<3:0> bits will cause an immediate clock frequency switch if the internal oscillator is providing the device clocks. |
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