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ACPL-331J bảng dữ liệu(PDF) 22 Page - AVAGO TECHNOLOGIES LIMITED |
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ACPL-331J bảng dữ liệu(HTML) 22 Page - AVAGO TECHNOLOGIES LIMITED |
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22 / 23 page ![]() Pull-up Resistor on FAULT Pin The FAULT pin is an open collector output and therefore requires a pull-up resistor to provide a high-level signal. Also the FAULT output can be wire ‘OR’ed together with other types of protection (e.g. over-temperature, over- voltage, over-current ) to alert the microcontroller. Figure 38. Large IGBT drive with negative gate drive, external booster. VCLAMP control secondary discharge path for higher power application. Figure 37. IGBT drive with negative gate drive, external booster and desaturation detection (VCLAMP should be connected to VEE when it is not used) VCLAMP is used as secondary gate discharge path. * indicates component required for negative gate drive topology Other Possible Application Circuit (Output Stage) 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VE VLED DESAT VCC2 VEE VOUT VCLAMP VEE VS VCC1 FAULT VS CATHODE ANODE ANODE CATHODE +_ +_ RG Q1 Q2 + VCE - RPULL-DOWN + HVDC - HVDC 3-PHASE AC + VCE - 0.1µF 0.1µF 0.1µF Optional R1 Optional R2 RG * 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VE VLED DESAT VCC2 VEE VOUT VCLAMP VEE VS VCC1 FAULT VS CATHODE ANODE ANODE CATHODE +_ +_ RG Q1 Q2 + VCE - RPULL-DOWN + HVDC - HVDC 3-PHASE AC + VCE - 0.1µF 0.1µF 0.1µF Optional R1 Optional R2 R3 9 RG R3 * Capacitor on FAULT Pin for High CMR Rapid common mode transients can affect the fault pin voltage while the fault output is in the high state. A 330 pF capacitor should be connected between the fault pin and ground to achieve adequate CMOS noise margins at the specified CMR value of 15 kV/µs. The added capaci- tance does not increase the fault output delay when a desaturation condition is detected. |
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