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ACPL-331J bảng dữ liệu(PDF) 19 Page - AVAGO TECHNOLOGIES LIMITED |
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ACPL-331J bảng dữ liệu(HTML) 19 Page - AVAGO TECHNOLOGIES LIMITED |
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19 / 23 page ![]() 1 Figure 33. Recommended application circuit (Single Supply) with desaturation detection and active Miller Clamp Description of Operation Normal Operation During normal operation, VOUT of the ACPL-331J is con- trolled by input LED current IF (pins 5, 6, 7 and 8), with the IGBT collector-to-emitter voltage being monitored through DDESAT. The FAULT output is high. See Figure 34. Fault Condition The DESAT pin monitors the IGBT Vce voltage. When the voltage on the DESAT pin exceeds 6.5 V while the IGBT is on, VOUT is slowly brought low in order to“softly”turn-off the IGBT and prevent large di/dt induced voltages. Also Figure 34. Fault Timing diagramactivated is an internal feedback channel which brings the FAULT output low for the purpose of notifying the micro-controller of the fault condition. Fault Reset Once fault is detected, the output will be muted for 5 μs (minimum). All input LED signals will be ignored during the mute period to allow the driver to completely soft shut-down the IGBT. The fault mechanism can be reset by the next LED turn-on after the 5us (minimum) mute time. See Figure 34. +_ +_ 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VE VLED DESAT VCC2 VEE VOUT VCLAMP VEE VS VCC1 FAULT VS CATHODE ANODE ANODE CATHODE +_ RG 100 Ω CBLANK DDESAT Q1 Q2 + VCE - RF R RPULL-DOWN + HVDC - HVDC 3-PHASE AC + VCE - 0.1µF 0.1µF 0.1µF CF 7 +_ - Figure 34. Fault Timing diagram IF VDESAT VOUT FAULT 6.5V 50% tDESAT(LOW) 10% tDESAT(10%) 90% tDESAT(90%) 50% tDESAT(FAULT) tDESAT(MUTE)) 50% tRESET(FAULT) Reset done during the next LED turn-on IF VDESAT VOUT FAULT FAULT 6.5V 50% tDESAT(LOW) 10% tDESAT(10%) 90% tDESAT(90%) 50% tDESAT(FAULT) tDESAT(MUTE)) 50% tRESET(FAULT) Reset done during the next LED turn-on |
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