AD9726-EBZ datasheet(10/24 Pages) AD

10 / 24 page

AD9726

Rev. B | Page 10 of 24

No.

Mnemonic

Description

DB4−

Data Bit 4 Complement

DB3+

Data Bit 3 True

DB3−

Data Bit 3 Complement

DB2+

Data Bit 2 True

DB2−

Data Bit 2 Complement

DB1+

Data Bit 1 True

DB1−

Data Bit 1 Complement

DB0+

Data Bit 0 True

DB0−

Data Bit 0 Complement

DVDD

Digital Supply Voltage

DGND

Digital Supply Common

SDO (SYNCALRM)

SPI Data Output (SYNCALRM)2

SDIO

SPI Data Input/Output3

SCLK (SYNCUPD)

SPI Clock Input (SYNCUPD)4

CSB

SPI Chip Select Bar (Active Low)

RESET

Hardware Reset (Active High)

REFIO

Internal Reference Input/Output5

FSADJ

Output Current Full-Scale Adjust6

SDR_EN

Single Data Rate Mode Enable7

ADVDD

Analog Supply Voltage

ADGND

Analog Supply Common

ACVDD

Analog Supply Voltage

ACGND

Analog Supply Common

AVDD2

Analog Supply Voltage

AGND2

Analog Supply Common

AVDD1

Analog Supply Voltage

No.

Mnemonic

Description

AGND1

Analog Supply Common

IOUTB

Analog Current Output Complement

IOUTA

Analog Current Output True

AGND1

Analog Supply Common

AVDD1

Analog Supply Voltage

AGND2

Analog Supply Common

AVDD2

Analog Supply Voltage

ACGND

Analog Supply Common

ACVDD

Analog Supply Voltage

ADGND

Analog Supply Common

ADVDD

Analog Supply Voltage

SPI_DIS

Serial Port Interface Disable8

EPAD

Analog Ground. Serves as an

electrical connection to the

substrate of the die and should be

connected to ground for electrical

and thermal purposes.

1 Nominally 1 kΩ to DBGND (may be omitted if data clock output is unused).

2 SDO is output in 4-wire SPI mode and three-state in 3-wire SPI mode. If SPI is

disabled (SPI_DIS = ADVDD), the alternate pin function is SYNCALRM output.

3 SDIO is input only in 4-wire SPI mode and bidirectional in 3-wire SPI mode.

4 If SPI is disabled (SPI_DIS = ADVDD), the alternate pin function is SYNCUPD.

5 Bypass with 0.1 μF to AGND1. Use the buffer amp to drive external circuitry.

Limit the output current to 1 μA. Apply an external reference to this pin.

6 Nominally 2 kΩ to AGND1 for 20 mA full-scale output (internal reference).

7 If SPI is disabled, tie the pin to ADVDD to enable SDR. Otherwise, tie to

ADGND.

8 Tie the pin to ADVDD to disable SPI; otherwise, tie to ADGND.

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