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ADSP-BF607 bảng dữ liệu(PDF) 45 Page - Analog Devices |
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ADSP-BF607 bảng dữ liệu(HTML) 45 Page - Analog Devices |
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45 / 112 page  Rev. 0 | Page 45 of 112 | June 2013 ADSP-BF606/ADSP-BF607/ADSP-BF608/ADSP-BF609 PE_10 I/O A wkwknone wknone VDD_EXT Desc: PE Position 10 | PWM1 Channel D Low Side | RSI0 Data 6 | ETH1 Management Channel Clock. Notes: Has an optional internal pull-up resistor for use with RSI. See the RSI chapter in the processor hardware reference for more details. PE_11 I/O A wkwknone wknone VDD_EXT Desc: PE Position 11 | PWM1 Channel D High Side | ETH1 Management Channel Serial Data | RSI0 Data 7. Notes: Has an optional internal pull-up resistor for use with RSI. See the RSI chapter in the processor hardware reference for more details. PE_12 I/O A wkwknone wknone VDD_EXT Desc: PE Position 12 | PWM1 Channel C Low Side | RSI0 Data 5 | ETH1 RMII Management Data Interrupt. Notes: Has an optional internal pull-up resistor for use with RSI. See the RSI chapter in the processor hardware reference for more details. May be used to wake the processor from hibernate or deep sleep mode. PE_13 I/O A wkwknone wknone VDD_EXT Desc: PE Position 13 | PWM1 Channel C High Side | RSI0 Data 4 | ETH1 Carrier Sense/RMII Receive Data Valid. Notes: Has an optional internal pull-up resistor for use with RSI. See the RSI chapter in the processor hardware reference for more details. PE_14 I/O A wkwknone wknone VDD_EXT Desc: PE Position 14 | SPORT2 Channel A Transmit Data Valid | TIMER0 Timer 0 | ETH1 Receive Error. Notes: No notes. PE_15 I/O A wkwknone wknone VDD_EXT Desc: PE Position 15 | PWM1 Channel B Low Side | RSI0 Data 3 | ETH1 Receive Data 1. Notes: Has an optional internal pull-up resistor for use with RSI. See the RSI chapter in the processor hardware reference for more details. PF_00 I/O A wk wk none wk none VDD_EXT Desc: PF Position 0 | PWM0 Channel A Low Side | EPPI0 Data 0 | LP2 Data 0. Notes: No notes. PF_01 I/O A wkwknone wknone VDD_EXT Desc: PF Position 1 | PWM0 Channel A High Side | EPPI0 Data 1 | LP2 Data 1. Notes: No notes. PF_02 I/O A wk wk none wk none VDD_EXT Desc: PF Position 2 | PWM0 Channel B Low Side | EPPI0 Data 2 | LP2 Data 2. Notes: No notes. Table 15. ADSP-BF60x Designer Quick Reference (Continued) Signal Name Type Driver Type Int Term Reset Term Reset Drive Hiber Term Hiber Drive Power Domain Description and Notes |
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