5CSEA2 datasheet(11/74 Pages) ALTERA

11 / 74 page

Chapter 1: Overview for Cyclone V Device Family

1–5

Cyclone V Family Plan

February 2012

Altera Corporation

Cyclone V Device Handbook

Volume 1: Device Overview and Datasheet

Table 1–4 and Table 1–5 list the Cyclone V SE, SX, and ST maximum resource counts.

Table 1–4. Maximum Resource Counts for Cyclone V SE Devices—Preliminary

Resource

Cyclone V SE Devices

5CSEA2

5CSEA4

5CSEA5

5CSEA6

ALM

9,434

15,094

32,075

41,509

25,000

40,000

85,000

110,000

Block Memory (Kb)

1,400

2,240

3,972

5,140

MLAB Memory (Kb)

138

220

480

621

Variable-precision DSP Block

112

18 x 19 Multiplier

116

174

224

FPGA Fractional PLL

HPS PLL

FPGA GPIO

124

288

HPS I/O

188

LVDS

FPGA Memory Controller

—

HPS Memory Controller

ARM Cortex-A9 MPCore Processor

Single- or dual-core Single- or dual-core Single- or dual-core Single- or dual-core

Table 1–5. Maximum Resource Counts for Cyclone V SX and ST Devices—Preliminary (Part 1 of 2)

Resource

Cyclone V SX Device

Cyclone V ST Device

5CSXC4

5CSXC5

5CSXC6

5CSTD5

5CSTD6

ALM

15,094

32,075

41,509

32,075

41,509

40,000

85,000

110,000

85,000

110,000

Block Memory (Kb)

2,240

3,972

5,140

3,972

5,140

MLAB Memory (Kb)

220

480

621

480

621

Variable-precision DSP Block

112

18 x 19 Multiplier

116

174

224

174

224

FPGA Fractional PLL (1)

666

HPS PLL

3-Gbps Transceiver

—

5-Gbps Transceiver

—

FPGA GPIO

124

288

HPS I/O

188

LVDS

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