ISP1507CBS datasheet(49/74 Pages) NXP

49 / 74 page

ISP1507C_ISP1507D_1

Product data sheet

Rev. 01 — 28 May 2008

49 of 74

NXP Semiconductors

ISP1507C; ISP1507D

ULPI HS USB host and peripheral transceiver

10.1.7 USB_INTR_STAT register

This register (see Table 33) indicates the current value of the interrupt source signal.

10.1.8 USB_INTR_L register

The bits of the USB_INTR_L register are automatically set by the ISP1507 when an

unmasked change occurs on the corresponding interrupt source signal. The ISP1507 will

automatically clear all bits when the link reads this register, or when the PHY enters

low-power mode.

Remark: It is optional for the link to read this register when the clock is running because

all signal information will automatically be sent to the link through the RXCMD byte.

The bit allocation of this register is given in Table 35.

Table 33.

USB_INTR_STAT - USB Interrupt Status register (address R = 13h) bit allocation

Bit

Symbol

reserved

SESS_

END

SESS_

VALID

VBUS_

VALID

HOST_

DISCON

Reset

00000

Access

RRRRRRRR

Table 34.

USB_INTR_STAT - USB Interrupt Status register (address R = 13h) bit description

Bit

Symbol

Description

7 to 4

reserved

SESS_END

Session End: Reﬂects the current value of the session end voltage comparator.

SESS_VALID

Session Valid: Reﬂects the current value of the session valid voltage comparator.

VBUS_VALID

VBUS Valid: Reﬂects the current value of the VBUS valid voltage comparator.

HOST_DISCON

Host Disconnect: Reﬂects the current value of the host disconnect detector.

Table 35.

USB_INTR_L - USB Interrupt Latch register (address R = 14h) bit allocation

Bit

Symbol

reserved

SESS_

END_L

SESS_

VALID_L

VBUS_

VALID_L

HOST_

DISCON_L

Reset

00000000

Access

RRRRRRRR

Table 36.

USB_INTR_L - USB Interrupt Latch register (address R = 14h) bit description

Bit

Symbol

Description

7 to 4

reserved

SESS_END_L

Session End Latch: Automatically set when an unmasked event occurs on SESS_END.

Cleared when this register is read.

SESS_VALID_L

Session Valid Latch: Automatically set when an unmasked event occurs on SESS_VLD.

Cleared when this register is read.

VBUS_VALID_L

VBUS Valid Latch: Automatically set when an unmasked event occurs on A_VBUS_VLD.

Cleared when this register is read.

HOST_DISCON_L

Host Disconnect Latch: Automatically set when an unmasked event occurs on

HOST_DISCON. Cleared when this register is read.

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