PCA9554AD datasheet(7/35 Pages) NXP

7 / 35 page

PCA9554_9554A

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Product data sheet

Rev. 9 — 19 March 2013

7 of 35

NXP Semiconductors

PCA9554; PCA9554A

8-bit I2C-bus and SMBus I/O port with interrupt

6.1.2 Register 0 - Input Port register

This register is a read-only port. It reflects the incoming logic levels of the pins, regardless

of whether the pin is defined as an input or an output by Register 3. Writes to this register

have no effect.

The default ‘X’ is determined by the externally applied logic level, normally ‘1’ when no

external signal externally applied because of the internal pull-up resistors.

6.1.3 Register 1 - Output Port register

This register reflects the outgoing logic levels of the pins defined as outputs by Register 3.

Bit values in this register have no effect on pins defined as inputs. Reads from this register

return the value that is in the flip-flop controlling the output selection, not the actual pin

value.

Table 5.

Bit

Symbol

Access

Value

Description

read only

determined by externally applied logic level

read only

Table 6.

Legend: * default value.

Bit

Symbol

Access

Value

Description

reflects outgoing logic levels of pins defined as

outputs by Register 3

6O6

5O5

4O4

3O3

2O2

1O1

0O0

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