AD9142BCPZ datasheet(21/65 Pages) AD

21 / 65 page

Data Sheet

AD9142

Rev. 0 | Page 21 of 64

LVDS Input Level Requirements

There are two types of LVDS receivers in the AD9142. The

16-bit data bus and the frame input share the same LVDS

receiver design. The DCI uses a different LVDS design. The

main difference between the two LVDS receivers is the required

input differential swing level. The data bus and frame receiver

require a minimum of ±100 mV swing at the input. The DCI

receiver requires a minimum of ±225 mV swing at its input.

Figure 35 shows the LVDS input configuration and the required

swing levels. Because the DCI is typically generated from the

same bank as the data in the data source, it is recommended

that the output swing of the LVDS driver be larger than the

required DCI input level, thus meeting both input data and DCI

requirements.

Figure 35. Data Interface Voltage Swing Requirements

1.32V

+225mV

–225mV

1.1V

DCIP

DCI

DCIN

AD9142 DCI INPUT LVDS LEVEL

1.25V

+100mV

–100mV

1.15V

DnP

DnN

AD9142 DATA AND

FRAME INPUT LVDS LEVEL

DnN

DnP

AD9142 LVDS INPUT CONFIGURATION

–

DCIN

DCIP

DCI

GND

AD9142

TO INTERNAL

DIGITAL

TO INTERNAL

DIGITAL

VCM = (VINP + VINN)/2 = 1.2V

100Ω

DATA

RECEIVER

DCI

RECEIVER

AD9142BCPZ bảng dữ liệu(PDF) 21 Page - Analog Devices

AD9142BCPZ bảng dữ liệu(HTML) 21 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65

bảng dữ liệu tải về

Link URL