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DS32EL0421 bảng dữ liệu(PDF) 9 Page - Texas Instruments

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tên linh kiện DS32EL0421
Giải thích chi tiết về linh kiện  5-bit DDR LVDS Parallel Data Interface
PDF  32 Pages
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Trang chủ  http://www.ti.com
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DS32EL0421 bảng dữ liệu(HTML) 9 Page - Texas Instruments

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TXCLK
80%
20%
tCIT
80%
20%
tCIT
SP
tBUF
tHD:STA
tLOW
tR
tHD:DAT
tHIGH
tF
tSU:DAT
tSU:STA
ST
SP
tSU:STO
SCK
SDA
SMB_CS
tSU:CS
ST
DS32EL0421, DS32ELX0421
www.ti.com
SNLS282F – MAY 2008 – REVISED APRIL 2013
CML Timing Specifications (continued)
Over recommended operating supply and temperature ranges unless otherwise specified.
(1) (2)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tJIND
Serializer Output Deterministic Jitter
Serializer output intrinsic deterministic
jitter. Measure with PRBS-7 test
pattern De-emphasis disabled.
See (3)
1.25 Gbps
10
ps
2.5 Gbps
24
ps
3.125 Gbps
21
ps
tJINR
Serializer Output Random Jitter
Serializer output intrinsic random
jitter. Bit error rate
≥10-15.
Alternating–10 pattern. De-emphasis
disabled.
See (3)
1.25 Gbps
1.3
psRMS
2.5 Gbps
1.15
psRMS
3.125 Gbps
1.14
psRMS
tJINT
Peak-to-peak Serializer Output Jitter
Serializer output peak-to-peak jitter
includes deterministic jitter, random
jitter, and jitter transfer from serializer
input. Measure with PRBS-7 test
pattern. Bit error rate
≥10-15. De-
emphasis disabled.
See (3)
1.25 Gbps
28
ps
2.5 Gbps
38
ps
3.125 Gbps
35
ps
λTXBW
Jitter Transfer Function -3 dB Bandwidth
1.25 Gbps
100
kHz
(4)
3.125 Gbps
300
kHz
δTX
Jitter Transfer Function Peaking
0.5
dB
(4)
(4)
Parameter is ensured by characterization and is not tested at production.
Timing Diagrams
Figure 1. SMBus timing parameters
Figure 2. Serializer Input Clock Transition Time
Copyright © 2008–2013, Texas Instruments Incorporated
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Product Folder Links: DS32EL0421 DS32ELX0421



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