MCP4441 datasheet(75/100 Pages) MICROCHIP

75 / 100 page

DS22265A-page 75

MCP444X/446X

8.4

Using the General Call Command

The use of the General Call Address Increment,

Decrement, or Write commands is analogous to the

“Load” feature (LDAC pin) on some DACs (such as the

MCP4921). This allows all the devices to “Update” the

output level “at the same time”.

For some applications, the ability to update the wiper

values “at the same time” may be a requirement, since

they delay from writing to one wiper value and then the

next may cause application issues. A possible example

would be a “tuned” circuit that uses several MCP44XX

in rheostat configuration. As the system condition

changes (temperature, load, etc.) these devices need

to be changed (incremented/decremented) to adjust for

the system change. These changes will either be in the

same direction or in opposite directions. With the

Potentiometer device, the customer can either select

the PxB terminals (same direction) or the PxA

terminal(s) (opposite direction).

Figure 8-6 shows that the update of six devices takes

6*TI2CDLY time in “normal” operation, but only

1*TI2CDLY time in “General Call” operation.

Figure 8-5 shows two I2C bus configurations. In many

cases, the single I2C bus configuration will be

adequate. For applications that do not want all the

MCP44XX devices to do General Call support or have

a conflict with General Call commands, the multiple I2C

bus configuration would be used.

FIGURE 8-5:

Typical Application I2C Bus

Configurations.

FIGURE 8-6:

Example Comparison of “Normal Operation” vs. “General Call Operation” Wiper

Updates.

Note:

The application system may need to

partition the I2C bus into multiple busses to

ensure that the MCP44XX General Call

commands do not conflict with the General

Call commands that the other I2C devices

may have defined. Also if only a portion of

the MCP44XX devices are to require this

synchronous operation, then the devices

that should not receive these commands

should be on the second I2C bus.

Single I2C Bus Configuration

Host

Controller

Device 1

Device 3

Device n

Device 2

Device 4

Multiple I2C Bus Configuration

Host

Controller

Device 1a Device 3a

Device na

Device 2a

Device 4a

Device 1b

Device 3b

Device nb

Device 2b

Device 4b

Bus b

Bus a

Device 1n Device 3n

Device nn

Device 2n

Device 4n

Bus n

Normal Operation

General Call Operation

INC

POT01

INC

POT02

INC

POT03

INC

POT04

INC

POT05

INC

POT06

TI2CDLY

TI2CDLY = Time from one I2C command completed to completing the next I2C command.

INC

POTs 01-06

INC

POTs 01-06

INC

POTs 01-06

INC

POTs 01-06

INC

POTs 01-06

INC

POTs 01-06

TI2CDLY

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