ADF4154BCPZ datasheet(21/24 Pages) AD

21 / 24 page

Data Sheet

ADF4154

Rev. C | Page 21 of 24

PCB DESIGN GUIDELINES FOR CHIP SCALE

PACKAGE

The lands on the chip scale package (CP-20-1) are rectangular.

The printed circuit board pad for these should be 0.1 mm

longer than the package land length and 0.05 mm wider than

the package land width. The land should be centered on the

pad. This ensures that the solder joint size is maximized.

The bottom of the chip scale package has a central thermal pad.

The thermal pad on the printed circuit board should be at least

as large as this exposed pad. On the printed circuit board, there

should be a clearance of at least 0.25 mm between the thermal

pad and the inner edges of the pad pattern to avoid shorting.

Thermal vias may be used on the printed circuit board thermal

pad to improve thermal performance of the package. If vias

are used, they should be incorporated into the thermal pad at

1.2 mm pitch grid. The via diameter should be between 0.3 mm

and 0.33 mm, and the via barrel should be plated with 1 oz of

copper to plug the via.

The user should connect the printed circuit board thermal pad

to AGND.

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